Syllabus

This course aims to teach you how to write fast code for the specialized hardware and accelerators proliferating in modern computers. In MIT terms, it is a spiritual follow-on to 6.106 (6.172) Software Performance Engineering, where we graduate from mainstream CPUs to things like GPUs. (6.106 or similar low-level programming, performance analysis, computer architecture, and performance optimization experience is expected as a prerequisite.)

Key things we expect you to learn include:

• Why do accelerators like GPUs look the way they do? We will both motivate and explain key architectural issues patterns like SIMD, multithreading, latency hiding, memory systems, matrix units, and spatial architectures (FPGAs/CGRAs), and see how similar ideas manifest in everything from multicore CPUs, to GPUs, TPUs, IPUs, and DSPs.

• How can we program them for high performance? The course emphasizes developing practical experience writing & optimizing code on modern accelerators (mostly CUDA on NVIDIA GPUs), and how the major architectural ideas manifest in how we program them.

• How to reason about accelerator performance from first principles.

The course is brand new, experimental, and under active development this term; you should expect rough edges. But we are excited to have you along on the journey with us, and are eager share what we know while also learning together with you!